What is it?
Protocols of Digital Scales
There are two different protocols for those "cheap Chinese Scales". Do not confuse these protocols with the ones (and completely different) of other scales. Other protocols not covered here (for now) are the Digimatic or the Quadrature-Encoder (QE) protocols.
Described here is the:
The protocols described here are the ones the DRO:int4 can handle. There is a small dongle that fits to the DRO:int4 and connects to QEs on the other side and behaves like a 2 * 24 Bit scale.
The scales can be switched in their state (hold modes, fast transfer, etc.) and it seems that these states are common among all scales.
The scales can be switched to different modes by pulling the clock or data line to H (= high = 1.55V). Not all scales do have corresponding bottoms or even describe the modes in their manuals. But it seems that all do at least implement the same state sequence until the F.T.-mode.
The modes, and how they are switched, is best described by a state diagram:
Gray rectangular boxes are events, round boxes are states.
The possible events are:
There are further events like OFF/ON or inch/mm, but they are either obvious or change the mode in any state. They are left out in this diagram, because there is no remote access to these buttons and to keep the diagram clearer.
The possible states are:
Note: You can only switch off the display, the digital interface stays active.
Attention: Ground planes and the scale itself are connected to battery +.
Nominal battery voltage is 1.55 V; L is < 0.2V; H is > 1.3V
This protocol is one that is rare to find. I got only one supplier (ALDI) who offered digital calipers with that protocol. As they were very inexpensive (EUR 9.99) it was worth implementing that protocol.
The pins (again):
The signal. Upper channel is clock, lower channel is data. A complete datagram is about 780us long. Every packet has 4 bits (BCD). The last packet transports additional information The whole datagram consists of 7 packets. So 6 digits can be transmitted that would result in a maximum range of 9999.99mm.
Two packets (the first two) at a closer look. Every packet has a lead in of 54us H. Following that are 4 clocks that signal the bits. Reading takes place at the falling edge of the clock. The first packet is the lowest (LSB first) number. If the display reads 123.45mm, the packets read 5, then 4, then 3, etc.
A single packet with a closer look at the timing. Reading is always at the falling edge!
The last packet (the seventh "BCD"):
The last packet does not transmit numbers, but additional information. So it is no BCD, but just 4 flags.
They are in detail (LSB first):
This is the most common protocol. It consists of 2 packets with each having 24 bits. So I call it the 2 * 24 bit protocol. Others name it the Sylvac-protocol (Sylvac seems to be the inventor).
The signal. Upper channel is clock, lower channel is data. A complete datagram is about 850us long. There are 2 packets. Every packet has 24 bits. The first packet transmits an absolute position, but there is no absolute info on the scale itself. It is quite worthless, because what the scale thinks that his absolute position is, changes whenever the power is removed. The second packet is the relative position in respect of where zero was pressed or the scale powered on.
Part of the first packet at a closer look. There is a lead-in that is about 53us long. Following that are 23 pulses that have a cycle time of 13us. As with the caliper with 7BCDs, data is read at the falling edge. Bits are transferred LSB first! Also, data is 2's complement.
If you think it is wise to read when the clock is H, here is a shot that shows a glitch that hopefully will stop you from making that error.
There is no information transmitted about the state the linear scale is in. No units, no hold, nothing. The data is not directly a representation of the display. To interpret the data, it has to be scaled. Every inch is divided into 20480 steps. Or every mm has 806.299 steps.
This would give a resolution of 0.00005 inch, or 0.0012mm! No, not exactly. The last bits have jitter, about +/-5 units. With the averaging and overshampling implemented in the DRO:ddisp-software, the jitter can be reduced and resolution increased.